The present disclosure relates to a semiconductor device and methods of forming the same. More specifically, the present disclosure is directed to a semiconductor device including a field effect transistor and a method of forming the same.
A field effect transistor (hereinafter referred to as “transistor”) is one of elements constituting a semiconductor device. Conventionally, a transistor includes a source region and a drain region formed on a semiconductor substrate to be spaced apart from each other and a gate electrode disposed to cover the top of a channel region between the source and drain regions. The formation of the source and drain regions is done by implanting dopant ions into the substrate. The gate electrode is insulated from the channel region by a gate oxide layer interposed between the substrate and the gate electrode. Such a transistor is widely being used as a single element constituting a switching device and/or a logic circuit in a semiconductor device.
In recent years, the operating speeds of semiconductor devices have been made higher while scales thereof have become smaller. Thus, transistors are decreasing in size. As a result, the turn-on current of a transistor may decrease to reduce the operating speed of the transistor. Moreover, the contact resistance between a drain region (or a source region) of a transistor and a contact structure may increase to reduce the operating speed of the transistor. Due to these causes, the operating speeds of semiconductor devices may be reduced. Accordingly, various studies have been conducted to enhance the operating speed of a highly integrated transistor.